Description
We are looking for a microelectronics engineer, with a first successful experience in verification at the IP or system (top level) SoC level.
Here are all your responsibilities:
- Ability to write and critique accurate and easy-to-reuse verification plans.
- Advanced expertise in the development of reusable and scalable code, with a deep mastery of the Verilog System and a proven competence in the UVM methodology.
- Strong competence in the exhaustive planning and precise writing of functional coverage as well as code coverage to ensure verification Thorough proficiency.
- Advanced proficiency in scripting languages such as Python, Perl, Tcl, demonstrating the ability to design scripts to automate and optimize new verification workflows.
- In-depth familiarity with state-of-the-art tools and advanced processes related to test bench development, encompassing all aspects of the verification cycle (Siemens / Cadence / Synopsys).
- Significant experience with C/C++ languages, attesting to the ability to write basic tests in C to reinforce the overall system verification.
- Easy communication to exchange with other team members and other business lines (design / DFT / backend).